For those unfamiliar with OpenRISC, it is an open-source RISC/DSP processor architecture.  OpenCores.org makes available an implementation of this architecture that can be synthesized, for example, as part of an FPGA or ASIC.  The port of eCos to OpenRISC was sponsored by the Rosum Corporation.

A few notes and caveats about the eCos OpenRISC port: Scott Furman
sfurman at rosum dot com